Google plans to package its next TPU, code-named Humufish, with Intel’s EMIB-T technology, according to SemiAnalysis. If that report is right, Google is preparing to move a flagship AI accelerator away from TSMC’s CoWoS family, the advanced packaging stack that has become the default choice for many high-end AI and HPC chips.
For Google, that would be a serious engineering bet. The company has used TSMC’s CoWoS packaging for TPUs from the third generation through its eighth-generation parts, according to the reported history of the program. Packaging is not a cosmetic layer at this scale. It determines how compute dies, memory stacks, power delivery, and high-speed links behave as one device.
TSMC’s CoWoS-S uses a silicon interposer, with package sizes reaching up to 3.3 times the reticle limit. Google later moved to CoWoS-L for its seventh- and eighth-generation TPUs. CoWoS-L replaces the large monolithic silicon interposer with a redistribution-layer interposer and local silicon interconnect bridges, allowing packages that today scale to 5.5 times reticle size. TSMC has said CoWoS-L should reach more than 14 times reticle size by the end of the decade.
What Intel is offering
Intel’s embedded multi-die interconnect bridge, or EMIB, takes a different route. Instead of spreading a silicon interposer or RDL interposer under the package, Intel embeds small silicon bridges in the organic substrate only where dense die-to-die communication is needed. The rest of the routing runs through the substrate.
EMIB-T adds through-silicon vias to those bridges, allowing power to move vertically. Intel also adds metal-insulator-metal capacitors and a dedicated ground plane in the bridge to improve power integrity. That matters for AI accelerators, where feeding the chip clean power has become as ugly a problem as moving data between dies.
The reported switch does not mean EMIB-T is universally superior to CoWoS-L. CoWoS-L already uses local bridge structures to work around reticle limits, so the usual argument that EMIB avoids the reticle wall is incomplete. CoWoS-L also has a package-wide RDL interposer, which can provide denser and more flexible routing across the full package than an ordinary organic substrate.
EMIB can provide very dense links at the bridge locations. Signals that need to travel farther must use the substrate or hop through more bridge topology. That tradeoff could matter differently depending on Google’s Humufish layout, which SemiAnalysis has not publicly detailed in the cited report.
Capacity and risk are part of the calculation
The choice may be about supply as much as physics. TSMC’s CoWoS capacity is heavily contested, especially by AI chip vendors. Nvidia has tended to reserve advanced packaging allocations far ahead of time, according to industry reporting cited in the discussion. Google may want another path that reduces dependence on TSMC’s packaging queue.
Mechanical behavior is another possible factor. Nvidia’s Blackwell data center GPUs reportedly suffered yield issues tied to coefficient-of-thermal-expansion mismatches among chiplets, bridges, interposers, and substrates, causing warping and failures. Nvidia found fixes, according to those reports, but larger packages can introduce new stress problems.
EMIB-T removes the large RDL interposer from the package structure, which may reduce one source of global thermomechanical stress. It does not remove warping, cracking, or local bridge stress from the engineering problem. Intel still has to manage the added complexity of TSVs, capacitors, metal structures, and ground planes inside the embedded bridges.
Google already has a strategic agreement with Intel around Xeon CPUs and custom IPUs for cloud infrastructure. A move to EMIB-T would also give Google a way to work with Intel Foundry without committing its TPU silicon to Intel’s process technology. If the Humufish report holds, Intel gets something it badly needs: a high-profile customer proving that advanced packaging can be a foundry product, not just an internal Intel trick.
This story draws on original reporting from Tom's Hardware.
