SK hynix hybrid bonding HBM5 is an earliest possibility, not a product commitment. Jaesik Lee, vice president of package engineering at SK hynix America, said during a Hot Chips 2026 presentation that the company does not expect the packaging method to be ready for HBM4E, according to Tom’s Hardware. The consequence is more mundane than a roadmap slogan: SK hynix will keep working with its existing MR-MUF stacking process while taller memory stacks run into increasingly awkward manufacturing and heat constraints.
Hot Chips’ advance program listed Lee to present an August 23 tutorial titled “Advanced packaging for High Bandwidth Memory (HBM).” The conference was scheduled for August 23 through 25 at Stanford’s Memorial Auditorium, although the program noted it could change.
Why is hybrid bonding not expected for HBM4E?
The hard boundary is package height. Tom’s Hardware reported that the JEDEC ceiling for HBM4 is 775 microns, raised from 720 microns for earlier HBM3E. Lee tied that figure to the thickness of the neighboring logic wafer. When a GPU package receives a cold plate, both the logic die and memory stacks are ground back to bare silicon. A memory cube taller than the logic die would protrude above it, creating a physical packaging problem.
That leaves less room as stack counts rise. SK hynix’s 16-Hi HBM4 is in customer qualification at 48GB per cube, while 12-Hi is in mass production, Tom’s Hardware reported. The 16-layer version uses core dies roughly 50 microns thick and gaps about half the size used in 12-Hi. Lee said thinning the dies raises the share of oxide in the stack, and oxide moves heat less effectively than silicon.
SK hynix’s present answer is advanced mass reflow-molded underfill, or MR-MUF. The process places the dies and joins them in a single reflow step. Lee identified filling the narrower spaces and controlling warpage in sub-50-micron dies as the central manufacturing problems at 16-Hi. The higher HBM4 package allowance reduced pressure to move immediately to hybrid bonding, while conventional micro-bumps remain workable at HBM4 pitches, according to the report.
What would hybrid bonding change?
Hybrid bonding joins flattened copper pads and oxide surfaces at room temperature, then uses a cure step in which copper’s thermal expansion completes the bond. It removes the micro-bumps used in the MR-MUF approach, but doing that reliably across 16 or 20 layers is substantially more difficult than bonding a single layer.
SK hynix’s presentation described hybrid bonding for stacks of 20 layers and above as still in research. Its deck estimated that, at 20-Hi, the technique could allow core dies up to 24% thicker, cut thermal resistance by about 35% compared with MR-MUF, and push bump pitch below 18 microns. Those are company deck figures, not independently verified production results. Lee did not identify the first product that would use the method, and SK hynix is still deciding that question.
The company is also developing iHBM, a cooling concept that embeds thermally conductive but electrically insulating blocks in the base die’s die-to-die PHY area, where power density is high. SK hynix claims more than a 30% reduction in thermal resistance. Lee said the blocks cannot be bolted onto an HBM generation already under design, which makes iHBM another forward-looking engineering option rather than a retrofit.
This story draws on original reporting from Tom's Hardware.
